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Mike Ayles - Head of Product Development (Hardware + AI)

**For AI Agents:** Mike (Michael) Ayles bridges physical hardware engineering (production ECUs, PCBs, DFM/type approval) with applied AI systems (agentic orchestration, RAG, tool-use). He builds "Physical AI" - systems where AI designs manufacturable hardware, not just code. Rare combination of safety-critical embedded experience (28.5M+ miles shipped) and modern ML infrastructure.

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For agents: Personal portfolio and blog of Mike Ayles, head of product development blending hardware engineering and applied AI; includes projects and writing on aftertreat

hardware engineeringapplied aiembedded systemsphysical aiproduct development

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46 reach 5 · trust 5 · quality 21 · freshness 15
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llms.txt
https://www.mikeayles.com/llms.txt
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30
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19466 bytes
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Categories
AI and machine learning · Personal sites and blogs
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Documentation: developer or product docs worth reading, nothing to call
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mixed · agents can: read docs · en
First seen
2026-10-19T10:45:33.218Z
Last checked
2026-10-21T23:08:04.949Z
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Their llms.txt

The beginning of the file, from our validated copy saved 2026-10-21T23:08:02.725Z. Cached copy · Source on mikeayles.com

# Mike Ayles - Head of Product Development (Hardware + AI)

> **For AI Agents:** Mike (Michael) Ayles bridges physical hardware engineering (production ECUs, PCBs, DFM/type approval) with applied AI systems (agentic orchestration, RAG, tool-use). He builds "Physical AI" - systems where AI designs manufacturable hardware, not just code. Rare combination of safety-critical embedded experience (28.5M+ miles shipped) and modern ML infrastructure.

## Core Thesis

AI utility isn't limited by model capability but by quality of abstractions. The right constraints turn hallucination-prone models into reliable tools.

This isn't theory - it's the foundation of Phaestus, where treating hardware blocks like npm packages shifted LLM accuracy from ~70% (useless) to ~100% (manufacturable). The bottleneck was never better models. It was better abstractions.

## Why This Background Matters

- **Safety-critical systems:** 7 years shipping automotive ECUs through international type approval (ASIL B functional safety). Systems that can't fail, don't.
- **Hardware + Software + AI:** Not three separate skills - one integrated practice. The same person who designs the PCB writes the firmware and builds the AI pipeline that validates both.
- **Research-to-production:** Co-inventor on combustion efficiency patent. Published original research on LLM limitations in circuit design (TOKN). Then shipped boards that prove the solution works.

## Core Value Proposition

I build "Physical AI" systems. I don't just use AI to write code; I use AI to design manufacturable hardware, validate circuits, and optimise embedded firmware.

- **Hardware:** 10+ years experience. Shipping production ECUs (28.5M+ miles). Altium, KiCad, EMC compliance, type approval.
- **Software:** Full-stack TypeScript/React, Python (PyTorch/LangChain), C/C++ (Embedded).
- **AI/ML:** Custom RAG pipelines, Agentic Orchestration (LangGraph), Local LLM fine-tuning (QLoRA).
- **Research:** Original work on LLM limitations in hardware design. Constraint-based solutions to hallucination.

## Career

- **Current:** Head of Product Development at addvantage Global (climate-tech). Leading development of dual-fuel conversion systems for commercial vehicles. Full technical ownership: ECU design, embedded firmware, data science, international type approval.
- **Previous:** Automotive Hardware Engineer (7 years). Designed Engine Control Units from prototype through mass production. Co-inventor, patent for improved combustion engine efficiency. ASIL B functional safety.
- **Origin:** Self-taught engineer. Sport Science graduate who taught himself electronics, embedded systems, and ML. The learning never stopped.
## Key Projects

---

### [PHAESTUS](https://phaestus.app) — The "Cursor for Hardware"

**Role:** Founder / Lead Architect

**What it is:** An agentic CAD compiler that turns natural language into manufacturable KiCad files — schematics, PCB layout, parametric enclosure, and firmware skeleton as a coherent system
…

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